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jFETによる電圧制御可変抵抗VCR

ライター:misao007009さん(最終更新日時:2016/10/1)投稿日:2016/7/26

jFETによる電圧制御可変抵抗VCR

       

 

 jFETで構成された電圧制御可変抵抗VCR

                     

http://www.vishay.com/docs/70598/70598.pdf

 

A voltage-controlled resistor (VCR) may be defined as a
three-terminal variable resistor where the resistance value
between two of the terminals is controlled by a voltage
potential applied to the third.
For a junction field-effect transistor (JFET) under certain
operating conditions, the resistance of the drain-source
channel is a function of the gate-source voltage alone and
the JFET will behave as an almost pure ohmic resistor.
Maximum drain-source current, IDSS, and minimum resistance
rDS(on), will exist when the gate-source voltage
is equal to zero volts (VGS = 0). If the gate voltage is increased
(negatively for n-channel JFETs and positively
for p-channel), the resistance will also increase. When the
drain current is reduced to a point where the FET is no
longer conductive, the maximum resistance is reached.
The voltage at this point is referred to as the pinchoff or
cutoff voltage and is symbolized by VGS = VGS(off). Thus
the device functions as a voltage- controlled resistor.

Figure 1 details typical operating characteristics of an nchannel
JFET. Most amplification or switching operations
of FETs occur in the constant-current (saturated) region,
shown as Region II. A close inspection of Region I (the unsaturated
or pre-pinchoff area) reveals that the effective
slope indicative of conductance across the channel from
drain-to-source is different for each value of gate-source
bias voltage. The slope is relatively constant over a range of
applied drain voltages, so long as the gate voltage is also
constant and the drain voltage is low.